Role - Hardware Applications Principal Engineer
Location - Santa Clara, CA (Hybrid)
Employment type - Full time Permanent
Responsibilities:
- Debug L1 ethernet issues related to Serdes and MAC/PHY (analyze Signal Strength, Serdes Eye, Review & Tune SI parameters etc.)
- Debug other interfaces on board such as PCIE, i2C, MDIO etc.
- Perform Schematics and Layout reviews of the customer design / platform and provide feedback
- Interact with HW designers (board and ASIC) and write Hardware Design guidelines, Application Notes and publish Technical Bulletins.
- Interface with board designers, ASIC /Serdes controller designers, program management, board vendors and component vendors to fully comprehend the board design parameters
- Generate PCB stack up recommendations that comprehend the full capabilities of industry available board fabrication materials and technologies
- Communicate effectively with customers considering both strategic and tactical aspects of the solution & work with internal cross-functional teams to deliver optimal solutions
Requirement:
- Bachelor’s degree in computer science, Electrical Engineering or related fields
- 10-15 years of related professional experience Or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.
Must possess excellent written and verbal communication skills.
- Must be able to present and clearly articulate solutions to customers.
Previous experience of working as an Application Engineer or any equivalent customer interacting role (i.e. ability to handle customers) is a must.
- Expertise in High Speed Ethernet Serdes interfaces : NRZ, PAM-4 100G.
- Expertise in Ethernet Physical layer (Layer 1) - Serdes, MAC, PCS including debugging L1 issues for Interop.
- Strong background in Signal Integrity, Power Integrity, Electromagnetics, Thermal, Multi-lane cross talk analysis and RF applications related to IC Package and PCB Design are required.
- Experience in using tools: HyperLynx, Ansoft SIWave and HFSS, ADS, Sigrity, PowerSI and PowerDC, Cadence Allegro, and Polar stack up
- Able to performance Schematics & Layout reviews effectively
- Atleast one scripting language : Python / Perl / Unix shell
- Expertise in MATLAB and Python a plus.
- Ability to handle Equipments: Servers (Windows / Linux), Scopes, Traffic generators (Ixia/Spirent/Xena), environmental chambers, Thermal Heads, Keysight VNA/TDR
- Ability to program High speed / optics modules and link up with various modules: LR, SR, ZR, ZR4, AECs etc.
Job Type: Full-time
Pay: $140,000.00 - $190,000.00 per year
Benefits:
- 401(k)
- Dental insurance
- Health insurance
- Vision insurance
Schedule:
- 8 hour shift
- Monday to Friday
Education:
Experience:
- Computer hardware: 10 years (Required)
- Electrical engineering: 10 years (Required)
- Perl: 10 years (Required)
- Ethernet: 10 years (Required)
- Python: 10 years (Required)
- IC Package: 10 years (Required)
- PCB Design: 10 years (Required)
- UNIX: 10 years (Required)
Ability to Commute:
- Santa Clara, CA (Required)
Work Location: On the road