Job Title: Design Verification Engineer
Locations: San Jose, CA
Type of hire: Fulltime/Contract
Job Description:
Education Requirements
- BS/MS in EE/CE, plus 7+ years of Design Verification experience
- Familiarity with ASIC, Computer and Embedded Systems Architectures
- Excellent oral and written communication skills with people at all levels, a must.
- Team player, with excellent debugging skills
Mandatory Experience
- Writing and maintaining test plans
- Creating and maintaining UVM testbenches
- Created a module testbench from scratch.
- Written Cover points, Assertions (SVA) and closed coverage
- Knowledge of standard bus protocols such as AHB, AXI, etc.
- Scripting and test automation for regression
- Experience with PCIe/NVMe and/or ONFI.
- Experience with SSD architecture.
- C/C++
Job Types: Full-time, Contract
Pay: $78,399.03 - $94,416.04 per year
Benefits:
- 401(k)
- 401(k) matching
- Dental insurance
- Health insurance
- Life insurance
- Paid time off
- Vision insurance
Ability to Commute:
Ability to Relocate:
- San Jose, CA: Relocate before starting work (Required)
Willingness to travel:
Work Location: In person