20 Best design engineer jobs in San Jose, CA (Hiring Now!)

STA/FEINT Design Engineer
Advanced Micro Devices, Inc —Santa Clara, CA
Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s…
Estimated: $129K - $163K a year
Hardware Design Engineer
Violet ink —Palo Alto, CA
Design and develop electronics hardware board with experience in drafting schematic, component Selection, Placement of components in Printed Circuit board (PCB)…
$50 - $55 an hour
Quick Apply
5d
Design Engineer - Program Management
Advanced Micro Devices, Inc —Santa Clara, CA
Define, plan, and drive engineering program plans based on senior technical guidance and involving multi-component environment (AMD IPs, SOCs, HW, SW, FW).
Estimated: $176K - $222K a year
Design Verification Engineer
Advanced Micro Devices, Inc —San Jose, CA
Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s…
Estimated: $127K - $161K a year
Design Verification Engineer
West Coast Consulting —San Jose, CA
Work experience in DV (Having a mix of SV, UVM, SVA, Coverage, Test planning. Prefer background in domains like CPU, GPU or other similar ASIC experiences.
$90 - $100 an hour
Quick Apply
4d
ASIC Design Engineer - (Front End)
Socionext America —Milpitas, CA
*Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).*. Experience and domain-knowledge in at least 2-3 of…
$160,000 - $220,000 a year
Quick Apply
6d
RFIC Design Engineer
Skyworks —San Jose, CA
The candidate will interface with design management and module design teams to create detailed specifications, report design progress, and collect, track, and…
$87,600 - $167,900 a year
Manufacturing Design Engineer (MDE) - iPhone
Apple —Cupertino, CA
Define best-in-class processes to meet all Apple design and operational requirements • Develop and document processes including all parameters, consumables and…
$148,200 - $223,100 a year
2d
Design Engineer
BKF Engineers —Pleasanton, CA
B.S. in Civil Engineering or related field from an ABET Accredited Curriculum or equivalent required. 0 - 3 years of experience in site development, and design…
$77,000 - $100,000 a year
Quick Apply
Waveguide Design (Optical) Engineer
HireIO, Inc. —San Jose, CA
Electromagne-c field theory, waveguide op-cs theory, etc.). Over 3 years of experience in diffrac-on op-cs design and geometric op-cs design.
$130,418.81 - $170,439.86 a year
Quick Apply
5d
Magnetic Recording Head Design Engineer
TDK Headway Technologies, Inc. —Milpitas, CA
Under the direction of the Sr. Director of Read Head Development, the Magnetic Recording Head Design Engineer is responsible for the magnetic design of read…
$96,655.20 - $142,140.00 a year
6h
SRAM Compiler Design Engineer
Apple —Cupertino, CA
Knowledge of industry standard circuit, design and integration tools. Collaborate with multi-functional team for failure analysis, corrective action…
$55.00 - $83.03 an hour
2d
Senior Hardware Design Engineer-Automotive Systems
HCLTech —Mountain View, CA
Bachelor's Degree in Electrical Engineering or related field. Strong understanding of SI/PI for board design. Experience with automotive audio and video systems…
$70 - $73 an hour
Quick Apply
Panel Design Engineer
Apple —Cupertino, CA
Apple is looking for a world-class Thin Film Transistor (TFT) panel design engineer to design, develop and launch the next TFT technologies for the portable,…
$138,900 - $256,500 a year
Senior Design Engineer – CPU Fetch Unit (Sunnyvale, CA)
Tachyum —Sunnyvale, CA
Logic design experience with state of the art deep submicron technologies specifically low power design techniques. Competitive salary and benefits package.
$150,000 - $300,000 a year
Digital Design Engineer
Tellus Solutions —Santa Clara, CA
You will own design, document, execute and deliver fully verified, high performance, area, and power efficient RTL to achieve the design targets and…
$180,000 - $250,000 a year
Quick Apply
4d
Staff Electrical Design Engineer
Tesla —Palo Alto, CA
Collaborating closely with mechanical design, firmware engineering, test, and manufacturing teams, you will optimize your designs for best-in-class performance…
$84,000 - $300,000 a year
3d
ASIC Design Engineer
Advanced Micro Devices, Inc —San Jose, CA
Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power…
Estimated: $114K - $144K a year
Physical Design Engineer (Sunnyvale, CA)
Tachyum —Sunnyvale, CA
Help define low latency/low skew clock tree methodology/design. Verilog knowledge and an understanding of ASIC design flow.
$150,000 - $300,000 a year
NFC Hardware Design Engineer
Apple —Sunnyvale, CA
Solid understanding of NFC systems including: NFC theory of operation (especially active load modulation), NFC circuit design, NFC antenna design considerations…
$170,700 - $300,200 a year

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STA/FEINT Design Engineer

Advanced Micro Devices, Inc - Santa Clara, CA

Apply Now

Job Details

Estimated: $129K - $163K a year

Benefits

Employee stock purchase plan

Qualifications

Master's degree
Verilog
Bachelor's degree
Perl
Communication skills
Python

Full Job Description

Overview:

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

Responsibilities:

THE ROLE:

The STA/Constraints Engineer is responsible for developing FullChip constraints and timing closure. They will work closely with Fellows, Principal Engineers, Architects, collaborate with cross functional worldwide teams across Physical Design, Timing Analysis, Synthesis, Physical Verification, Power signoff, and mentor/coach/guide Design Engineers.

KEY RESPONSIBILITIES:

Lead the full chip timing team for constraints and timing signoff.
Own end-to-end delivery of designs (SOC and Sub-system integration) from timing constraints and timing signoff perspective.
Work closely with the SOC Architecture team for SOC clocks & STA for statistical timing target goals.
Understanding clock design requirements and making sure they are correctly set up in SDC.
Understand timing margins (LVF/SSTA/Variations etc.) on the latest tech nodes and work with timing methodology teams for future and current projects.
Understand design requirements, timelines and various milestones of a project and deliver FCT closure accordingly.
Lead the timing ECO phase and plan for on-time project tape out.
Collaborate with CAD and EDA vendors to further strengthen AMD timing closure and constraints methodology.
Responsible for cdc/lint, timing closure, lower power implementation and netlist quality check with RTL designer and PD team.
Work on SDC development, STA (Static Timing) analysis, shift left of timing closure, CDC (Clock Domain Crossing).

PREFERRED EXPERIENCE:

Experienced PD professional with industry experience in STA, constraints, timing signoff and physical design
Expert user of industry-standard PD tools like SNPS PT/GCA (must) and ICC2/FC (desired).
Good experience and understanding of DFT timing concepts, MBIST, Top level clock -implementation, Place and Route flows -floorplanning and placement, CTS and Route.
Good experience with Perl/TCL/Shell/Python scripting, and Verilog RTL design.
Excellent presentation and inter-communication skills.
Experience with Verilog RTL design/implementation and has experience of large digital ASIC project.
Experience with physical design is a plus.
Has Synthesis or physical implement experience.
Experience with lower power design methodology.

ACADEMIC CREDENTIALS:

Bachelor/Master’s degree in Micro Electronics/ Integrated Circuit Science, or related field preferred.

#LI-PA1

Qualifications:

At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Apply Now

design engineer jobs in San Jose, CA

STA/FEINT Design Engineer

Hardware Design Engineer

Design Engineer - Program Management

Design Verification Engineer

Design Verification Engineer

ASIC Design Engineer - (Front End)

RFIC Design Engineer

Manufacturing Design Engineer (MDE) - iPhone

Design Engineer

Waveguide Design (Optical) Engineer

Magnetic Recording Head Design Engineer

SRAM Compiler Design Engineer

Senior Hardware Design Engineer-Automotive Systems

Panel Design Engineer

Senior Design Engineer – CPU Fetch Unit (Sunnyvale, CA)

Digital Design Engineer

Staff Electrical Design Engineer

ASIC Design Engineer

Physical Design Engineer (Sunnyvale, CA)

NFC Hardware Design Engineer

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