325
fpga engineer jobs in San Jose, CA
Arista Networks —Santa Clara, CA
Proficient in design verification tools and languages (SystemVerilog, SVA, Modelsim, Perl, Python, Unix shell scripts). Review the design functional coverage.
$130,000 - $180,000 a year
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Qcells —Santa Clara, CA
Collaborate with all other engineering teams (electrical, mechanical, controls). You will also be tasked to develop FW for the SoCs that provide network…
Estimated: $74.5K - $94.4K a year
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12d
Tarana Wireless —Milpitas, CA
Proficiency with Verilog, System Verilog, digital logic design, simulation and FPGA implementation. Participating in module level design and simulating a…
$120,000 - $155,000 a year
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Stellartech Research Corporation —Milpitas, CA
Review and develop Software Requirements Specifications (SRS) and Software Design Specifications (SDS) for product software.
Estimated: $88.6K - $112K a year
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Innogrit —San Jose, CA
Experience in SystemVerilog OVM/UVM, synthesis, mixed-signal circuit schematics design, and layout design. Contribute to micro-architecture designs for state-of…
Estimated: $118K - $150K a year
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Apple —Sunnyvale, CA
PHY firmware architecture and design, including calibrations, realtime processing flows, collaborate with RF hardware, microcode, and MAC layer.
$55.82 - $84.09 an hour
Innogrit —San Jose, CA
Master's degree in electrical or electronics engineering. Candidate is responsible for PCIe Controller design, integration and simulation.
Estimated: $125K - $159K a year
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Blue Pearl Software —Santa Clara, CA
Deliver product demonstrations, answer inquiries, and assure prospective customer is exposed to the full capabilities and benefits of products specific to their…
Estimated: $113K - $143K a year
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TenaFe, Inc —Campbell, CA
Strong in C/C++ programming, and scripting using Python, Makefile. The job is responsible to implement C/C++ software library to bring up and drive SOC chip.
Estimated: $109K - $138K a year
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Advanced Micro Devices, Inc —San Jose, CA
Expert user of industry-standard physical design, analysis, and sign-off tools. Define, develop, and drive design, timing, and power methodologies for advance…
Estimated: $143K - $181K a year
Super Micro Computer —San Jose, CA
Bachelor's degree in electrical/computer engineering or computer science preferred, MS degree is strongly desirable.
$85,000 - $146,000 a year
PTEC Solutions —Fremont, CA
Experience with Simulation tools, like VCS and ModelSim. Experience using FPGA Debug tools, like Xilinx Chipscope, etc. Version Code control: GIT, BitBucket.
Estimated: $105K - $133K a year
Cadence Design Systems —San Jose, CA
The candidate is also expected work with technical support lead and key customers to resolve implementation or usage issues. This is a Full-time position.
$92,400 - $171,600 a year
Advanced Micro Devices, Inc —San Jose, CA
A successful candidate will employ these skills to develop driver-level C code, debug failures across software, hardware, and solutions, and drive these issues…
Estimated: $120K - $152K a year
Neuralink —Fremont, CA
Demonstrated track record of success in a science or engineering field, evidenced by outstanding projects, innovations, or advanced problem-solving.
$116,000 - $235,000 a year
13d
Infinera —San Jose, CA
We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine…
$117,800 - $218,800 a year
Algo-Logic Systems, Inc. —San Jose, CA
Design, develop and execute automation scripts using open source tools. No calls from agencies or recruiters will be returned.
Estimated: $104K - $132K a year
Socionext America —Milpitas, CA
*Hands-on ASIC front-end design, ideally in design services environments (product backgrounds acceptable).*. Experience and domain-knowledge in at least 2-3 of…
$160,000 - $220,000 a year
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Apple —Santa Clara, CA
The primary skills required for this job are RTL design, simulation, expertise in mapping designs to emulation, improving model performance, excellent…
$170,700 - $300,200 a year
1d
INTEL —Santa Clara, CA
Apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as…
$144,501 - $217,311 a year
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